ACS9510EVB【PDF 1/6 页】EVALUATION BOARD FOR ACS9510

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ACS9510 ToPSync?

Single-chip master/slave timing synchronization

solution for legacy and packet networks

ADVANCED COMMS & SENSING

About the ACS9510

The ACS9510 combines Semtech's SETS (TDM timing) and

ToPSync? (PTP timing) technologies to accommodate

applications where a remote clock signal must be locked to a

central frequency source, or a clock must be aligned to a

central time source. TDM timing functionality is used for

frequency-locking applications in SDH/SONET/SyncE

equipment. ToPSync? technology transports a reference clock

across a packet switched network without special adaptations

of switches or routers, and is ideal for carrying timing across a

legacy packet-switched network.

System diagram

Standards

The ACS9510 complies with these standards:

[1] IEEE Std. 1588? (2008).

[2] ITU-T G.812 (06/1998).

[3] ITU-T G.813 (08/1996).

[4] ITU-T G.823 (03/2000).

[5] ITU-T G.824 (03/2000).

[6] ITU-T G.8261/G.8262 (formerly G.pactiming).

[7] Telcordia GR-1244-CORE, Issue 2 (12/2000).

[8] Telcordia GR-253-CORE, Issue 3 (09/ 2000).

[9] RoHS Directive 2002/95/EC.

[10] Waste electrical and electronic equipment (WEEE) 2003.

FINAL PRODUCT BRIEF

Features

PTP timing features

PTP Grandmaster selection - automatic or manual PTP

master/slave mode selection.

Powerful network delay analysis - delivers full time-

alignment in the slave over hostile networks (including

Layer 2 & 3 routed).

Dynamic adaptation - to network delay variations. Network

loading change tolerant (ramps and steps).

Time alignment - better than ±1 μ s on a managed 5-switch

GbE network under G.8261 6 test conditions.*

Frequency alignment - better than ±10 ppb on a managed

5-switch GbE network under G.8261 6 test conditions.*

TDM timing features

Programmable TDM Timing bandwidth - for wander and

jitter tracking/attenuation, 0.1 Hz to 70 Hz in 10 steps.

Automatic hit-less source switchover - on loss of input.

Output clock phase adjustment - in 6 ps steps to ±200 ns.

Precision holdover - accuracy better than 3 x 10 -10

(manual), 7.5 x 10 -14 (instantaneous). Holdover stability

defined by choice of external crystal oscillator.

Device features

Fully integrated - IEEE1588 1 PTP network timed/reference

timed solution. Integrates hardware precision

timestamping with on-the-fly insertion (no follow-up

packets required). Powerful processor and clock recovery

algorithm integrated.

Timing synchronization on a chip - supporting transitions

from legacy circuit networks to new packet technology.

Suitable applications - Stratum 3, 4E, 4, SONET Minimum

Clock (SMC) or SONET/SDH Equipment Clock (SEC) and

Ethernet, IEEE1588 1 PTP.

Clocks - 20 clock inputs and 19 clock outputs.

Ports - MII, SPI-compatible and JTAG.

Time-of-day (ToD) - 1 PPS top-of-second signal plus

current-time-since-epoch message.

Output characteristics:

Time-aligned output pair:

1 PPS and 125 MHz divided by n (n = 4 to 125000).

Frequency-aligned outputs:

1 Hz and programmable frequency 1 kHz to 62.5 MHz.

Low jitter frequency-aligned outputs:

n x E1, n x DS1, frame sync + multi-frame sync clocks.

SONET and SDH OC-n rates: 3.84 MHz to 155.52 MHz.

Local oscillator - operation with XO of frequency accuracy to

This is an indication of Semtech tested performance and is not

guaranteed across all types of switches and network conditions. Please

contact Semtech ToPSync TM support for further details.

±20 ppm or better.

BGA package - 360 pin, 20 mm x 20 mm, 1 mm pitch.

Lead-free version - RoHS 9 and WEEE 10 compliant.

ACS9510PB_US, Revision 02, October 2008

?2008 Semtech Corp.

Page 1

www.semtech.com

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